Michal Kapalka, LPD, EPFL, Switzerland
"The future of concurrent programming: alternatives to critical sections"

Major chip manufacturers are close to reaching the limit of increasing
the speed of individual processor cores, and are shifting towards
parallel processing capabilities (multiprocessor systems and
multi-core processors). This means that future applications will
rely more and more on concurrent computing in some form.
Unfortunately, although creating a number of threads is easy,
synchronizing their access to shared  data in an efficient manner
is a major task. Commonly used
lock-based techniques (critical sections, monitors, etc.) do not
scale well and pose a number of engineering problems, like deadlock
or priority inversion.

The aim of the seminar is to give an overview of alternative
techniques for managing concurrency. We will focus on transactional
memory, which has recently gained much attention from major companies
and research communities worldwide.
Although a number of problems has not been solved yet, transactional
memory is already perceived an important alternative to hand-crafted
fine-grained locking. We will present transactional memory, and some
other thread synchronization techniques, from both a theoretical and
a practical perspective.